MT2301 single p-channel power mosfet general description this p-channel power mosfet is pro duced using mos-tech semiconductors advanced powertrench process that has b een especially tailored to minimize the on-state r esistance and yet maintain low gate charge for superior switching performance. these devices a re well suit ed for portable electronics applications: load s witching and power management, battery charging circui ts and dc/dc conversion. features ? C3 .3 a, C20 v. r ds(on) = 0.072 ? @ v gs = C4.5 v r ds(on) = 0.096 ? @ v gs = C2.5 v ? low gate charge (3.6 nc typical) ? high performance trench technology for extremely low r ds(on) ? supersot tm - 2 3 provides low r ds(on) and 30% higher power handling capability than sot23 in the same footprint g d s sot - 23 tm d s g absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage C20 v v gss gate-source voltage 12 v i d drain current C continuous (note 1a) C 3.3 a C pulsed C10 maximum power dissipation (note 1a) 0.5 p d (note 1b) 0.46 w t j , t stg operating and storage junction temperature range C55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 250 c/w r jc thermal resistance, junction-to-case (note 1) 75 c/w package marking and ordering information device marking device reel size tape width quantity 010x MT2301 7 8mm 3000 units MT2301 mos-tech semiconductor co.,ltd ?20 10 mos-tech semiconductor corporation www.mtsemi.com rev.d
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -20 v dbv dss /dt j breakdown voltage temp. coefficient i d = -250 a, referenced to 25 o c -16 mv / o c i dss zero gate voltage drain current v ds = -16 v, v gs = 0 v -1 a t j = 5 5c -10 a i gssf gate - body leakage, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate - body leakage, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2 ) v gs(th) gate threshold voltage v ds = v gs , i d = -250 a -0.8 -1.5 v dv gs(th) /dt j gate threshold voltage temp. coefficient i d = -250 a, referenced to 25 o c 3 mv / o c r ds(on) static drain-source on-resistance v gs = -4 .5 v, i d = -1.3 a 0.072 0.08 w t j =12 5c 0.12 0.15 v gs = -2 .5 v, i d = -1.1 a 0.096 0.15 i d(on) on-state drain current v gs = -4.5 v, v ds = -5 v -3.3 a g fs forward transconductance v ds = -4.5 v, i d = -2 a 4 s dynamic characteristics c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1.0 mhz 330 pf c oss output capacitance 80 pf c rss reverse transfer capacitance 35 pf switching ch aracteristics (note 2) t d(on ) turn - on delay time v dd = -5 v, i d = -0.5 a, v gs = -4.5 v, r gen = 6 w 7 15 ns t r turn - on rise time 12 22 ns t d(off) turn - off delay time 16 26 ns t f turn - off fall time 5 12 ns q g total gate charge v ds = -10 v, i d = - 2 a, v gs = -4 .5 v 3.6 5 nc q gs gate-source charge 0.8 nc q gd gate-drain charge 0.7 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -0.42 a v sd drain-source diode forward voltage v gs = 0 v, i s = -0 .42 a (note) -0.7 -1.2 v note: 1. r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. rev.d a. 250 o c/w when mounted on a 0.0 2 in 2 pad of 2oz cu. b. 270 o c/w when mounted on a 0.001 in 2 pad of 2oz cu.
rev.d 0 2 4 6 8 10 0.8 1 1.2 1.4 1.6 1.8 2 - i , drain current (a) drain-source on-resistance v = -2.5 v gs d r , normalized ds(on) -4.5v -3.5v -4.0v -3.0v typical electrical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate figure 3. on-resistance variation with temperature. 0.5 1 1.5 2 2.5 0 1 2 3 4 -v , gate to source voltage (v) - i , drain current (a) v = -5v ds gs d t = -55c j 125c 25c figure 5 . transfer characteristics. 0.2 0.4 0.6 0.8 1 1.2 1.4 0.001 0.01 0.1 1 10 -v , body diode forward voltage (v) - i , reverse drain current (a) 25c -55c v = 0v gs sd s t = 125c j figure 4. on-resistance variation with gate-to-source voltage. -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = -4.5v gs i = -1.3a d 0 2 4 6 8 10 0 0.1 0.2 0.3 0.4 0.5 - v , gate to source voltage (v) gs r , on-resistance (ohm) ds(on) i = -0.6a d t = 125c a 25c figure 6. body diode forward voltage variation with source current and temperature. 0 1 2 3 4 5 0 2 4 6 8 10 -v , drain-source voltage (v) - i , drain-source current (a) ds d -2.5v -2.0v -3.5v -3.0v v = -4.5v gs
rev.d 0.0001 0.001 0.01 0.1 1 10 100 300 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r =270c/w t = 25c q ja a figure 10. single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r (t) = r(t) * r r = 270 c/w duty cycle, d = t /t 1 2 q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 0.1 0.2 0.5 1 2 5 10 20 40 100 200 400 700 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss figure 8. capacitance characteristics. figure 7. gate charge characteristics. figure 9. maximum safe operating area. typical electrical characteristics (continued) 0 1 2 3 4 0 1 2 3 4 5 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -5v ds -15v i = -1.3a d -10v 0.2 0.5 1 3 5 10 30 0.01 0.03 0.1 0.3 1 3 10 30 -v , drain-source voltage (v) -i , drain current (a) rds(on) limit d ds v = -4.5v single pulse r = 270c/w t = 25c q ja gs a dc 1s 100ms 10ms 1ms 10s figure 11. transient thermal response curve . thermal characterization performed using the conditions described in n ote 1b. transient thermal response will change depending on the circuit board design.
sot23-3l packaging configuration: f igure 1.0 c omponents leade r t ape 500mm minimum or 125 em pty pockets tr ailer ta pe 300mm minimum or 75 em pty pock ets sot23-3l tape leader and trailer configuration: f igure 2.0 c over t ape c arrier tape note/comments packaging option sot23-3l packaging information s tandar d (no flow code) d87z packaging type reel size tn r 7" d ia tn r 13" qty per reel/tube/bag 3, 000 10, 000 box dimension (mm) 193x 183 x80 355x 333 x40 max qty per box 15, 000 30, 000 weight per unit (gm) 0. 0082 0. 0082 weight per reel (kg) 0. 1175 0. 4006 sot23-3l unit orientation partno.label embossed carrier tape antistat ic cover tape packaging description: s ot 23-3l par ts ar e s hipped i n tape. t he carrier tape is made from a d issipative (carbon filled) polycarbonate resin. t he cover tape i s a m ultilay er film (hea t activated adhes ive in nature) primarily c omposed o f pol yester film, adhes ive l ayer, seal ant, and anti-static s prayed ag ent. t hes e reeled parts i n s tandard option ar e s hipped with 3, 000 units per 7 " or 177mm diameter reel. t he r eels ar e dark blue in c olor and is made of polystyrene plas tic ( anti- static coated). o ther option c omes in 10,000 units per 13" or 330c m diameter reel. t his and s ome other options ar e des cribed in the p ackaging i nformation table. t hes e f ull reel s are i ndividually labeled and plac ed inside a s tandar d immediate bo x made o f r ecyclable corrugated brown paper w ith a f airchild logo p rinting. o ne box contains f ive reel s maximum. and thes e immediate boxes are plac ed inside a labeled s hipping box which c omes i n different s izes depending on the nu mber of pa rts s hipped. xh1 MT2301actr xh2 c97i27k1-018i-k133 m13274 d spec : qt y : 3000 d 193m m x 183m m x 80m m pizza box for standard option b arcode lab el b l b arcode l abel s ample mos-tech semiconductor ltd ( actr) sot-23 std tape and reel data ?2010 mos-tech semiconductor corporation rev. d 018i 018i 018i 018i ? m a r k i n g diagram ? 0 1 x x ? 01manufacturer id x:year ? code ? x:month ? code ?
sot-23 std tape and re el data, continued dimensions are in millimeter pkg type a0 b0 w d0 d1 e1 e2 f p1 p0 k0 t wc tc sot-23 (8mm) 3.15 +/-0.10 2.77 +/-0.10 8.0 +/-0.3 1.55 +/-0.05 1.125 +/-0.125 1.75 +/-0.10 6.25 min 3.50 +/-0.05 4.0 +/-0.1 4.0 +/-0.1 1.30 +/-0.10 0.228 +/-0.013 5.2 +/-0.3 0.06 +/-0.02 dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 8mm 7" dia 7.00 177.8 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 - 0.429 7.9 - 10. 9 8mm 13" dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 - 0.429 7.9 - 10. 9 see detail aa dim a max 13" diameter option 7" diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed sot23-3l embossed carrier tape configuration: figure 3.0 sot23-3l reel configuration: figure 4.0 p1 a0 d1 f w e1 e2 tc wc k0 t b0 d0 p0 p2 october 2 010 , rev. d
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